ECS 201A Study Guide - Midterm Guide: Scalability, Infor, Toyota Electronic Modulated Suspension
9 Jan 2019
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What two principles make it work: (4) what do the following acronyms stand for: Include the impact on design, cost, speed, and programming model. 2 : (12) dopey is a computer which has a cpi of 1. 0 when all memory accesses hit in the cache. The only data accesses are loads and stores, which total 30% of the instructions. System a (happy) uses a direct mapped cache, while system b (sneezy) uses a two-way set associative one. Since a set-associative cache requires an extra multiplexor/selector, the cycle time of sneezy is 1. 25 longer than that of happy. The cache miss penalty is 75ns for both sys- tems. a. ) Calculate the average memory access time and cpu performance for each processor. Assume the hit time is 1 clock cycle, the miss rate of a direct-mapped 64kb cache is 1. 4%, and the miss rate for a 64kb two-way set associative cache is 1. 0%.
