Class Notes (1,100,000)
CA (620,000)
McGill (30,000)
COMP (700)
Lecture 9

COMP 273 Lecture Notes - Lecture 9: Bit Manipulation, Exception Handling, Opcode

Computer Science (Sci)
Course Code
COMP 273
Piotr Przytycki

This preview shows page 1. to view the full 5 pages of the document.
COMP 273 9 - MIPS instructions 2 Feb. 8, 2016
Register names (save, temporary, zero)
From what I have said up to now, you will have the impression that you are free to use any of the 32
registers ($0, . . . , $31) in any instruction. This is not so, however. Certain registers have restricted
use. I will introduce these as needed over the next few lectures.
For the instructions we have seen up to now, one typically uses only registers $16,..$23, that
is, registers 10*** . These registers are named $s0,..$s7, where “s” stands for “save”.
Another set of registers that you will use commonly is $8,..$15, that is, registers 01*** . These
registers are named $t0,..$t7 where the “t” stands for temporary. As we will see, these registers
typically store values that are needed only temporarily.
As an example, consider the C or Java instruction:
This instruction is implemented by first computing (g + h) and then subtracting ifrom the result.
The value g + h is temporary in the sense that it not stored as part of the instruction. Its value is
thrown away after iis subtracted. We might want to use a $t register for it. Here is an example
of the corresponding MIPS instructions:
add $t0, $s1, $s2 # temporary variable $t0 is assigned the value g+h
sub $s0, $t0, $s3 # f is assigned the value (g+h)-i
Another register that gets a special name is $0. This register is called $zero, and it always
contains the value 0. The hardware prevents you from writing into this register!
More I format instructions
Conditional branches
There is a limited number of I format instructions since an I format instruction must be specified
entirely by the opcode and the op code field has 6 bits. We have already seen lw,sw,beq. There
is also a bne (branch if not equal to).
if (a == b)
f = g + h;
The corresponding MIPS instructions might be:
bne $17, $18, Exit1 # if a is not equal to b, goto Exit1
add $19, $20, $21 # f = g + h
Exit1: # Next instruction (following if statement).
What about other conditional branches? You might expect there to also be a blt for “branch
if less than”, bgt for “branch if greater than,” ble for “branch if less than or equal to”, etc. This
would make programming easier. However, having so many of these instructions would use up
precious opcodes. The MIPS designers decided not to have so many instructions and to take an
alternative approach.
last updated: 10th Feb, 2016 1 lecture notes c
Michael Langer
You're Reading a Preview

Unlock to view full version

Only page 1 are available for preview. Some parts have been intentionally blurred.

COMP 273 9 - MIPS instructions 2 Feb. 8, 2016
To execute a statement such as “branch on less than” in MIPS, you need two instructions. First,
you use an R format instruction, slt which stands for “set on less than”. The slt instruction is
then combined with beq or bne. Together, these span all possible inequality comparisons , <, , >.
See (new) Exercises 4. Here is an example for the C code. I will use C variable names s1 and s2
to make it easier to see what’s going on.
if (s2 > s1)
x = y + z
We want to branch if the condition fails, that is, if s2 is not greater than s1. So, we set a temporary
variable to the truth value ”s2 > s1” or equivalently ”s1 > s2”. We want to branch if the condition
is false, that is, if the truth value is 0. Here is the MIPS code, assuming C variables s1 and s2
correspond to MIPS registers $s1 and $s2 respectively:
slt $t0, $s1, $s2 # set t0 if j < i
beq $t0, $zero, Exit # branch if condition fails, that is, $t0 = 0
add $19, $20, $21 # x = y + z
Here is another example. First, the C code:
while (s1 <= s2)
s1 = s1 + s5;
Here we want to exit the loop (branch) if the condition fails, namely, if s1 > s2,i.e. if s2 < s1 .
Here’s the MIPS code:
MyLoop:slt $t0, $s2, $s1
bne $t0, $zero, MyLoopExit
add $s3, $s3, $s5
j MyLoop # back to top of loop
“Pseudoinstructions” for conditional branches
As mentioned above, the instructions slt,beq, and bne can be combined to give several conditional
branches that we would commonly wish to use, namely blt,ble,bgt,bge. It would be annoying if
we had to use the slt instruction to write conditional branches in MIPS. Fortunately, we don’t need
to do this. The MIPS assembly language allows you to use instructions blt,ble,bgt,bge. These
are called pseudoinstructions in that they don’t have a corresponding single 32 bit machine code
representation in the MIPS. Rather, when a MIPS assembler (or a simulator like MARS) translates
the assembly language program that you write into machine code, it substitutes two instructions,
namely a slt instruction and either a beq or bne.
Heads up: this substitution uses register $1 to hold the value of the comparison. You should
therefore avoid intentionally using that register when you are programming, because the MIPS
assembly may destroy the value you have put in that register! Only use $tand $sto hold variables.
last updated: 10th Feb, 2016 2 lecture notes c
Michael Langer
You're Reading a Preview

Unlock to view full version