COMPENG 2DI4 Lecture Notes - Lecture 20: Sequential Circuits, Sequential Logic, Clock
Document Summary
Mealy and moore models: the most general model of a sequential circuit has inputs, outputs, and internal states, it is customary to distinguish between two models of sequential circuits, mealy model, moore model. This is signi cant because it may cause momentary false values. Thus inputs must be synchronized with the clock. Output is function of input and present state. Having an output that can change state between clock cycles. Having an output that can change state only on clock cycles. Steps to analyze: determine the inputs/output to/from each ff using present state and inputs, then choose, use the corresponding ff characteristic table to determine next state, directly apply the next state equations to calculate next state values. Steps to analyze: determine the inputs/output to/from each ff using present state and inputs. Steps to analyze: use the corresponding ff characteristic table to determine next state. A timed binary counter that generates a ag once max value reached.