A.H.Dixon CMPT 150: Week 11 (Nov 13 - 15) 78
38 THE HC-12 CPU
The Motorola HC-12 CPU is a commercial CPU that implements an instruction set of over
200 instructions. In order to better understand how these instructions are executed, it is
helpful to understand the basic organization of the datapath of the CPU. Of immediate
note, are the registers found within CPU:
▯ A and B registers: These registers hold the operands for most arithmetic and logic
instructions. Therefore it is the programmer’s responsibility, using the instruction
set, to transfer the values that are to serve as operands to these registers so that the
operation de▯ned by an arithmetic or logic instruction can be performed.
▯ PC register: This register is the \Program Counter", described previously. Its
purpose is to hold the address in memory of the next instruction to be executed. A
\program" is a sequence of instructions stored in consecutive locations of memory.
By incrementing this register each instruction can be retrieved in turn as the program
▯ IR register: This register is the \Instruction Register" and its purpose is to hold
for execution an instruction when it is retrieved from memory.
▯ CCR register: The \Condition Code Register" keeps track of the status information
following the execution of an instruction, including whether there is a carry out after
addition, whether a result is negative or equal to 0, etc.
39 THE FETCH/EXECUTE CYCLE
The fetch/execute cycle for the HC-12 CPU describes how this particular CPU implements
the fetch/execute cycle described previously. It is similar to that description, except that
the HC-12 calculates the address of the next instruction as soon as the latest instruction
to be executed has been fetched and before it is executed:
1. Initialize the Program Counter (PC) to address of 1st instruction.
2. Get the instruction starting at the address provided by PC. Since a word of memory
is only 8 bits, most HC-12 instructions require more than one 8-bit word of memory
to store all of the machine language instruction in memory.
3. Set PC to address of next instruction. This means the PC must be incremented by a
value equal to the number of words of memory that were accessed for the instruction
just retrieved. This number is provided in the HC-12 instruction summary sheet in
parentheses following the opcode.
4. Decode the instruction: Determine its opcode.
5. Execute the instruction: Determine the sequence of ▯-instructions required to execute
6. Go to step 2. A.H.Dixon CMPT 150: Week 11 (Nov 13 - 15) 79
40 ASSEMBLY LANGUAGE PROGRAMS
The representation of a program by a set of binary sequences adequately addresses the
requirements of the CPU in order for the program to be executed, but is unsatisfactory for
humans because such a representation is di▯cult to read. Therefore machine programs are
represented in textual notation called \assembly language". Assembly language notation
replaces binary sequences representing opcodes and addresses by symbolic ones. A pro-
gram called an \assembler" then translates the assembly language program into a machine
language one. It may also load the program into memory.
Assembly language statements consist of two types:
1. \Instructions" that are symbolic representations of machine language instructions;
that is, they can be executed by the CPU-datapath.
2. \Pseudo-operations (\pseudo-ops" for short) that provide directions to the assembler
program about how to interpret the symbolic notation of the program and where
to place the machine language instructions into memory. Pseudo-ops are used to
allocate parts of a program to particular memory addresses, to reserve and possibly
initialize speci▯c memory locations and to assign labels to numeric constants.
Finally, not only the opcodes and operands are replaceable by labels, but so too are speci▯c
locations in memory. The assembler must then identify a particular physical location in
memory with each label and make the appropriate substitutions for these labels during
assembly when they occur in the operand ▯elds of instructions.
Some example pseudo-ops for the HC-12 CPU are as follows:
▯ org : Speci▯es the address where all instructions following it are to
be loaded until another ORG pseudo-operation is encountered.
▯ ds.b : Reserves a number of bytes of memory, as spec-
i▯ed by the integer value, for later use. No value is assigned to the reserved bytes.
The address of the ▯rst byte of memory reserved with this pseudo-op can be assigned
▯ dc.b : Initializes one byte of memory to have the value
given. The address of this byte can be assigned a label.
▯ equ: Equates a particular identi▯er with a speci▯c numeric constant. This is useful
in reducing the need to search for all occurrences of a particular value in a program,
if that value is subject to change.
Assembly language instructions can be classi▯ed according to function. Frequently there are
a number of choices available for performing a particular function and so the programmer
must choose which is most appropriate by knowing the behavior of each instruction and
what is required for a speci▯c program. A.H.Dixon CMPT 150: Week 11 (Nov 13 - 15) 80
41 DATA TRANSFER & ARITHMETIC
41.1 Data Transfer
In the HC-12 instruction set there are instructions for the programmer to transfer data
between memory and the A and B registers of the HC-12 CPU.
To load registers A or B with a value stored at memory location N:
LABEL INST OPND FUNCTION
LDAA (opnd) A (opnd)]
LDAB (opnd) B (opnd)
The operand of these instructions, (opnd), can be an address or a value. The CPU interprets
(opnd) as an address unless it is preceded by the \#". For example:
\LDAA 10" means \A M[000A]", while
\LDAA #10" means \A 0A".
Values can be expressed in decimal, hexadecimal, binary, or as characters. The assembler
determines how to interpret a value by the pre▯x symbol that may precede a value:
▯ \10" (without a pre▯x denotes the decimal 10mber 10 .
▯ \$10" denotes the hexadecimal nu16er 10 .
▯ \%00111001" denotes the binary sequence 00111001.
▯ \ ’A’ " denotes the character ‘A’, stored as an ASCII character code.
To store registers A or B at memory location N:
LABEL INST OPND FUNCTION
STAA N M[N] A
STAB N M[N] B
The HC-12 instruction set provides instructions to perform addition and subtraction of
LABEL INST OPND FUNCTION
ABA A A + B
ADDA (opnd) A A + (opnd)
SUBA (opnd) A A ▯ (opnd)
ADDB (opnd) B B + (opnd)
SUBB (opnd) B B ▯(opnd)
As an example HC-12 assembly language program, consider a program to implement a mod-
(N+1) counter. Because CPU chips are so inexpensive, they are commonly used today to
implement functions like this, even though one could build a custom circuit to perform the
An algorithm for a mod-(N+1) counter is as follows:
1. Initialize counter, CVAL to 0. A.H.Dixon CMPT 150: Week 11 (Nov 13 - 15) 81
2. Compare CVAL with N.
3. If CVAL = N then go to step 1.
4. Increment CVAL
5. Go to step 2
▯ Location for value of N. By assigning di▯erent values to the location N, the same
program can increment a counter for any value.
▯ Location to "display" current value of count, CVAL. The HC-12 has no output in-
structions. Instead the value to be output is placed in a location in memory designated
by the programmer.
▯ Location for increment value 1. One way to provide constant values needed by the
algorithm is to store them in memory. Labels are assigned to these locations that
ect the constant stored there.
LABEL INST OPND COMMENT
CVAL DS.B 1 ; Current counter value
N DC.B 15 ; Maximum count value
ONE DC.B 1 ; Increment value
RESET CLRA ; A = current CVAL
LOOP STAA CVAL ; Display current value
ORG $FFFE ; Location of start address
HiByte DC.B $0A
LoByte DC.B $00
43 CONTROL STRUCTURES
\Control structures" are program statements that determine the order of execution. Every
program includes one or more of the following types of control:
1. Sequencing - a set of instructions is performed in the order speci▯ed.
2. Branching - A choice can be made as to which instruction is to be performed next.
3. Iteration - A set of instructions can be performed repeatedly until some condition is
satis▯ed. A.H.Dixon CMPT 150: Week 11 (Nov 13 - 15) 82
An important early result in computing science, called the \Bohm-Jacopini Result", states
that only these three di▯erent types of control structure are required to express any algo-
The \condition" is usually based on the result of some arithmetic operation. The HC-12
datapath includes a register, called the \Condition Code Register (CCR)" that keeps track
of the various status conditions within the CPU. This register is made up of of