CSC258H1 Lecture Notes - Lecture 14: Clock Signal, Combinational Logic
Document Summary
When clock signal is high, the output toggles back and forth and produces this waveform: (for circuit on the right) Transparent means that any changes to its inputs are visible to the output when control signal (clock) is 1. Key take-away: output of a latch should not be applied directly or through combinational logic to the input of the same latch. It should also not be connected to input of another latch with the same control signal. If we want to preserve last 4 inputs to the circuit, we would need to connect c0 - c3 to different control signals. Connecting c0-c3 to the same control signal would not work, and each control signal would have to be carefully timed to achieve desired behaviour. Carefully managing timing of multiple signals is difficult. Preferable behaviour: have all circuit elements behaviour be dictated by one control signal.
