CSC258H1 Lecture Notes - Address Decoder, Food Processor, Readwrite

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20 Apr 2013
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Registers small number of fast memory units that allow multiple values to be read and written simultaneously. Ex. in a*b multiplication, any intermediary values is stored here, such as p at each iteration. Memory has a conduct (bus) from the main part (registers, alu) to where memory is b/c memory is separated from the cpu. There is a main line from memory to cpu since only need to access one line in memory at a time; not separate lines for each lines of memory; other lines are sealed. Implication: cpu only need m-bits to connect to memory, rather than accessing 2m connections to memory. 32 spots, most are allocated for special purpose access. Since some lines (bus) will now be used for both input and output, use new gate called the tri-state buffer. A bus is n-bit wide, access entire row of memory at once. When we (write enable) signal is low, buffer output is a high impedance signal.

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