CSC258H1 Lecture Notes - Bitwise Operation, Subroutine, Assembly Language

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Published on 20 Apr 2013
School
UTSG
Department
Computer Science
Course
CSC258H1
Professor
MIPS Instructions cont.
o Shift instructions
1st character: "s" = shift
2nd character: "l" or "r" = shift direction
3rd character: "a" or "l" = arthematic or logical
shift left logical == shift left arthematic (not in use)
4th (optional) character: "v" = a variable number of bits,
specified by $s
Instruction
Opcode/
Function
Synatx
Operation
sll
000000
$d, $s, a
$d = $t << a
sllv
000100
$d, $t, $s
$d = $t << $s
sra
000011
$d, $t, a
$d = $t >> a
srav
000111
$d, $t, $s
$d = $t >> $s
srl
000010
$d, $t, a
$d = $t >>> a
srlv
000110
$d, $t, $s
$d = $t >>> $s
Data movement instructions
o These instructions for operating on the HI and LO registers
Instruction
Opcode/
Function
Operation
mfhi
010000
$d
$d = hi
mflo
010010
$d
$t = lo
mthi
010001
$s
hi = $s
mtlo
010011
$s
lo = $s
ALU instructions
o Note that for ALU instructions, most are R-type instructions
The six-digit codes in the table are therefore the function codes
(opcodes are 000000)
Exceptions are the I-type instructions (addi, andi, orri, etc.)
o Note all R-type instructions have an I-type equivalent
RISC architecures dictate that an operation doesn’t need an
instruction if it can be performed through multiple existing
operations
Ex. addi + div divi
Store the immediate value into a register first than divide
Example program
o A fibonacci sequence C code into assembly code
1. int fib(void) {
2. int n = 10;
3. int f1 = 1, f2 = -1;
4. while (n != 0) {
5. f1 = f1 + f2;
6. f2 = f1 f2;
7. n = n 1;
8. }
9. return f1;
10. }
o In assembly
Note: beq, j, and sb instructions will be touched upon later
1. # fib.asm
2. # register usage: $t3=n, $t4=f1, $t5=f2
3. # RES refer to memory address of result
4. FIB: addi $t3, $zero, 10 # initialize n=10
5. addi $t4, $zero, 1 # initialize f1=1
6. addi $t5, $zero, -1 # initialize f2=-1
7. LOOP: beq $t3, $zero, END # done loop if n==0
8. add $t4, $t4, $t5 # f1 = f1 + f2
9. sub $t5, $t4, $t5 # f2 = f1 - f2
10. addi $t3, $t3, -1 # n = n 1
11. j LOOP # repeat until done
12. END: sb $t4, RES # store result
o Making an asssmbly program
Assembly Lanauge programs typically have structure similar to
simple Python or C programs
Set aside registers to store data
Have sections of instructions that manipulate this data
Its always good to decide at the beginning which registers will
be used for what purpose
Control flow in assembly
o Not all programs follow a linear set of instructions
Some operations require the code to branch to one section of
the code or another (if/else)
Some require the code to jump back and repeat a section of
code again (for/while)
o For this, we have labels on the left-hand side that indicate the points
that the program flow might need to jump to
References to these points in the assembly code are resolved at
compile time to offset values for the program counter
o Branch instructions
Branch operations are key when implementing if statements
and while loops
The labels are memory locations, assigned to each lable at
compile time
Note: i is calculated as
(label (current PC + 4)) >> 2
In branch i-type instruction last 16 bits is the difference btwn
the branch-call location and the branch-to location
beq = branch if equals
bgtz = branch if greater than
blez = branch if lesser than or equals to
bne = branch if not equals
Note: branch if lesser than DNE, instead: beq, bgtz & blez
Instruction
Opcode/Fun
ction
Synatx
Operation
beq
000100
$s, $t, label
if ($s == $t)
pc += i << 2
bgtz
000111
$s, label
if ($s > 0)
pc += i << 2
blez)
000110
$s, label
if ($s <= 0)
pc += i << 2
bne
000101
$s, $t, label
if ($s != $t)
pc += i << 2
o Jump instructions
j = “jump”, for calling subroutines
similar to GOTO statements
if an assembly program doesn’t have jump statements,
the program will run from beginning to end sequentially
jal = “jump and link”, for calling functions
register $ra ($31) stores the address that’s used when
returning from a subroutine
jalr = “jump and link to register”
jr = “jump to register”, jump to address contain in register $s
usually for ending a subroutine by jumping to the return
address stored in $ra
note: jr and jalr are not j-type instructions
Instruction
Opcode/
Function
Synatx
Operation
j
000010
label
pc += i << 2
jal
000011
label
$ra = pc; pc += i << 2
jalr
001001
$s
$31 = pc; pc = $s
jr
001000
$s
pc = $s
o Comparison instructions
Comparison operation stores a:
1 in the dst register if the less-than comparison is true
0 in the dst register otherwise
Instruction
Opcode/
Function
Synatx
Operation
slt
101010
$d, $s, $t
$d = ($s < $t)
sltu
101001
$d, $s, $t
$d = ($s < $t)
slti
001010
$t, $s, i
$t = ($s < SE(i))
sltiu
001001
$t, $s, i
$t = ($s < SE(i))
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Document Summary

Control flow in assembly: shift instructions. 2nd character: l or r = shift direction. 3rd character: a or l = arthematic or logical. Shift left logical == shift left arthematic (not in use) 4th (optional) character: v = a variable number of bits, specified by . 000100 , , = << sra. 000111 , , = >> srl. 000110 , , = >>> . Data movement instructions: these instructions for operating on the hi and lo registers. = lo hi = lo = . Alu instructions: note that for alu instructions, most are r-type instructions. The six-digit codes in the table are therefore the function codes (opcodes are 000000) Exceptions are the i-type instructions (addi, andi, orri, etc. : note all r-type instructions have an i-type equivalent. Risc architecures dictate that an operation doesn"t need an instruction if it can be performed through multiple existing operations.

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