ECS 154A Lecture Notes - Lecture 15: Operand, Complex Instruction Set Computing, Instruction Set
14 Jul 2016
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Pc points to next bit pattern that will be put into the ir. Ir is register that holds bit pattern that is to be decoded (the instruction) X,z are registers needed so multiple things don"t simultaneously try to write to the bus. (also need registers to use. Won"t work at this point using only the circuits we know about. ) Ir selects operation to perform operation takes place on selected date (need to get data) In this case, address of first operand put into mar. Our 1-bus machine requires multiple cycles to accomplish anything because of contention for the bus. This works better, but is still not perfect. Now, we can do instructions like a=b+c, and it will only take a single cycle! 3-bus computer takes fewer cycles to execute instructions than 1-bus and 2-bus, but it still takes more than 1. Solve by putting a little adder up in the fetch area. Complex addressing modes require multiple trips to memory.
