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ECSE 425 (1)
Final

Final Review.pdf

16 Pages
121 Views

Department
Electrical Engineering
Course Code
ECSE 425
Professor
Warren Gross

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Description
Review Tutorial What to expect ● The exam will be long (likely to have many small-to-medium sized questions, but few very big ones) ● It will focus on the part of the course after the midterm ⇒ these topics can be more difficult than the midterm ones ● It will likely include a few short answer questions (explain the difference, explain the advantage, give the definition, etc.) Study strategy ● It is critical to practice with the examples in the class notes, tutorials, old exams, and textbook. ● At this stage you probably won't have time to read the textbook, but do look at the examples in it! Sometimes they have more detailed explanations. ● Short answer questions are usually meant to be easy marks, so don't miss them! If you don't have the time to solve problems for a particular topic (e.g., software pipelining), then at least try to remember it's definition. ● This tutorial will highlight the topics that are most likely to be on the exam Performance ● CPU time equations are an absolute must to understand. It can be applied to all topics of this course ● Amdahl's Law – be able to derive it from CPU time equations, and be ready to derive variants of it ● Other performance ratings (e.g., AMAT, MFLOPS, MIPS) – in addition to knowing how to calculate them, understand their limitations in assessing performance ● Performance questions could involve delays from anything you learned in the course. For example, you could be asked to find the CPU time where the machine has delays from: pipeline hazards, branch mispredictions, multiple levels of cache misses, TLB misses, virtual memory misses Pipelining ● Nothing new here: just what you were expected to know for the midterm – Pipeline timing diagrams (IF ID ...) for a segment of code (both integer & floating point ops) – Indicate forwarding paths on your diagram – Understand the difference between two methods of handling branches: delayed branches & predict- not- taken branches – Be able to reschedule code Dynamic scheduling (1) ● What you were expected to know for the midterm: – Understand the advantage of using dynamic scheduling – Be able to identify data, output, and anti-dependencies in a given code sequence – Understand when RAW, WAR, WAW hazards occur (identify them in a code sequence) and the relationship of these hazards to the 3 types of dependencies – Understand why WAR & WAW hazards can be avoided with register renaming. Dynamic scheduling (2) ● Tomasulo's Algorithm is very popular question – Understand the hardware organization. Note that on you exam, the load/store buffers may be separate from the reservation stations – Given a code sequence, be able to figure out for each instruction when its issue, execution, & result stages occur – Be able to fill the contents of reservation stations, register status table, and load/store buffers for any given cycle in a code sequence – Understand how branches are handled – Understand how WAR & WAW hazards are avoided – If the question did not give certain timing details (e.g., does write result stage occur one cycle later than the execution stage's last cycle?), then state your own assumption and be consistent in your solutions Dynamic scheduling (3) ● Dynamic branch prediction – Understand why we use dynamic branch prediction – The most important branch predictors to understand are: 1-bit predictor, 2-bit predictor, correlating predictors (especially (1,1) & (1,2) ) – Understand their implementation (e.g., how the branch history table is organized) and know their advantages/disadvantages – For each type of branch predictor, be able to find the prediction accuracy for a given C code s
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