ECE327 Midterm: ECE 327 University of Waterloo 2014 Term 2 Midterm Solution

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All requests for re-marks must be submitted in writing to. Mark aagaard before 8:30am on friday march 7. Ex- ams that are submitted for re-marking will be veri ed against this set. Q2 the yellow, the red, and the goaaalllll!!! Q1 (10 marks) vhdl semantics (estimated time: 7 minutes) Justify your answer in terms of vhdl simulation semantics. Yes, if the simulation round contains exactly one simulation cycle. In the rst simulation cycle of a simulation round, timed processes are executed. If none of the timed processes that run change the value of any signals, then there will not be any more simulation cycles in the simulation round. Q2 (20 marks) the yellow, the red, and the goaaalllll!!! (estimated time: 10 minutes) Ece 327: if the code does not follow good coding practices: explain why, if the code does follow good practices: draw the circuit that would most likely result from synthesizing the code.