CSC369 Midterm Study Notes.doc

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University of Toronto St. George
Computer Science
Angela Demke Brown

CSC369 Midterm Study NotesMain memory is only storage other than registers CPU can access directlyCPU and memory use virtualization to present physical resources as more powerful then they are more cores memory etc then actually existsHardware Support for OSProtection domains user mode and system modemode bitInterruptsTimersMMU Memory Management UnitOther hardwareProtection by adding mode bit to hardware and make some instructions privileged oIf user mode tries to use privileged instrprotection faulttrap to OSInterrupts a hardware signal that causes CPU to jump to predefined instruction called interrupt handler 1 OS fills in Interrupt Table at boot time2 CPU execution loop fetch instruction at PC Decode instr execute instr3 Interrupt occurs signal from hardware4 CPU changes mode disables interrupts5 Interrupted PC value is saved6 IDTRinterrupt number is used to set PC to start interrupt handler7 Execution continues saves additional state as first stepHardware Interrupts Allow device controllers to signal the CPU that some event has occurred eg disk IO complete network package arriveSoftware Interrupts Are used to signal errors eg div by 0 or request for OS services form a user program a system calloThese types of instructions are called traps or exceptionsHardware starts in system mode to run OS code immediately oFirst process created is initoThen switch to user mode and run first processFirst 512 bytes of physically memory for OS161 are reserved for exception vector codeA process contains all of the states of a program in executionVirtual Memory Layout OS161Process State and State ChangesPCB generally includes Process state ready running blocked Program counter address of the next instructionCPU registers must be saved at an interruptCPU scheduling information process priorityMemory management info page tablesaccounting information resource use info
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