ECE 210 Study Guide - Midterm Guide: Karnaugh Map, Circuit Diagram, Maurice Karnaugh
23 May 2018
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ECE 210 :Logic Design TEST 2: Fall 2017
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Show all your work. Do your own work; cheating will result in immediate failure.
NOTE: The use of calculators is not allowed.
Problem 1
A majority circuit is a combinational circuit whose output is equal to 1 if the input variables have more 1’s than
0’s. The output is zero otherwise. Design a three-input majority circuit. Name the input signals x, y and z.
a. Draw the truth table of the design. [5]
b. Minimize the function using a Karnaugh map and write a minimum sum-of-product expression for the
design. [10]
c. Draw a logic circuit diagram of the design using only NAND gates. [10]
