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Textbook Notes for SOEN 228 at Concordia University

CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 1: Modular Arithmetic

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Modular arithmetic (unsigned & signed (must be in 2s complement! Fraction representation associative power starting from 0: 3. 14 = (3*100) + (1*10-1)
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CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 2: Propagation Delay, Static Random-Access Memory, Junkers J 1

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Digital logic, mux, decoder, flip-flops, latches, registers, and counter. Pitfall: r-s flip flop (edge triggered vs level-sensitive)20. Parallel load 4
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CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 3: Intel 8086, Data Structure, Unit

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Mar (main address register) and mdr (memory data register)5. Quick comparison between 3, 2, 1 address instructions13. Using ( ) in combination with oth
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CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 5b: Multiprocessing, Web Cache, Memory Hierarchy

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In-depth look @ cache memory in computer system (cache miss/hit)3. Goal of memory hierarchy is provide memory system with cost as lowest as cheapest le
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CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 4: Tempo, P-Glycoprotein, Operand

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Fetch phase for simple cpu organization (#4, cpu diagram)2. Fetch-execute of a complete instruction (single bus organization)7. Fetch phase for simple
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CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 5a: Data Loss, And Gate, Dynamic Random-Access Memory

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Memory system, 1-d, 2-d, & 2 - d setup. Maximum size determined by number of address lines: definition: address space = 2k. K is # of address of lines
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CONCORDIASOEN 228Tadeusz ObuchowiczWinter

SOEN 228 Chapter Notes - Chapter 2b: Estonian Kroon, Canonical Normal Form

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Features: works with variables & logical operators, binary logic: 0 (false) & 1 (true) discrete value. Operators: and (dot), or (plus), not ( , or bar)
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