SOEN 228 Chapter Notes - Chapter 2: Propagation Delay, Static Random-Access Memory, Junkers J 1
6 Jan 2016
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Digital logic, mux, decoder, flip-flops, latches, registers, and counter. Pitfall: r-s flip flop (edge triggered vs level-sensitive)20. Parallel load 4-bit register (one pulse loads data simultaneously)23. Mod-5 counter design using j-k flip-flops (see page 44, #2b)25. Asynchronous (no clock: 0 and 1, z: high impedence state. 5 gates: and, or, not, nand, nor. And, or, not are functionally complete: represent 3 fundamental operations of boolean algebra. And gate can be used as pass gate: set one of the inputs to 1", to block output, have one input 0". And gate as a masking operation: example: Sum of product: when output = 1: Take product of inputs and add to other 1" outputs. Features: takes 2 single-bit numbers and adds them, produces a carry bit and sum bit. Features: 3 inputs (x, y, carry, 2 output: sum, carry out, 2 half-adders. Selects one output from multiple inputs: output: decided by select line.
