MGMT 1050 Chapter Notes - Chapter 20: Hertz, Instruction Register
MGMT 1050 Chapter 20 Notes – Summary
Introduction
A Model for Improved CPU Performance
• The frequency of the clock and the number of steps required by each instruction
determine the speed with which the computer performs useful work.
• The pulses of the clock are combined with the data in the instruction register to control
electronic switches that open and close in the right sequence to move data from
register to register in accordance with the instruction cycle for the particular instruction.
• The memory activation line described is an example of a timing line.
• The activation line is set up so that it will not turn on until the correct address decode
line in the MAR has had time to settle down.
• If this were not the case, several address lines might be partially turned on, and the data
transferred between the memory and MDR might be incorrect.
• Such errors can obviously not be tolerated, so it is important to control timing
accurately.
• Conceptually, each pulse of the clock is used to control one step in the sequence.
• Although it is sometimes possible to perform multiple operations within a single step.
• The clock in the original IBM PC, for example, ran at 4.77MHz (MHz is pronounced
megahertz), which meant that the machine could perform 4.77 million steps every
second.
• If a typical instruction in the IBM PC requires about ten steps, then the original IBM PC
could execute about (4.77/10) or about 0.5 million PC instructions per second.
• A PC running at 8MHz, with everything else equal, would perform approximately twice
as fast.
• There are several factors that determine the number of instructions that a computer
can perform in a second.
• Obviously the clock speed is one major factor.
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