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LSUEE 2731AllFall

74ls138

OC9940623 Page
15 Mar 2019
0
The lsttl / msi sn54 / 74ls138 is a high speed 1-of-8 decoder / This device is ideally suited for high speed bipolar memory chip select address decodin
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LSUEE 2731AllFall

Elevator Verilog

OC9940628 Page
15 Mar 2019
0
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LSUEE 2731AllFall

E5G56

OC99406214 Page
15 Mar 2019
0
Equations: f = a"b"c"d + abc"d" + a"bc"d + ab"c"d + a"b"cd + abcd. G = ac"d" + a"c"d + acd + a"cd". // additional comments: module exp_5a(a,b,c,d,f,g);
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LSUEE 2731AllFall

E8G16

OC9940628 Page
15 Mar 2019
0
This experiment will introduce you to the design of a controller circuit used to control 3 shift registers. The controller will be used to make the shi
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LSUEE 2731AllFall

Elevator 2

OC99406213 Page
15 Mar 2019
0
Module elevator( input first_floor, input second_floor, input third_floor, input fourth_floor, input clk, input d_switch, //door safety switch output l
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LSUEE 2731AllFall

Experiment 8

OC9940622 Page
15 Mar 2019
0
This experiment will introduce you to the design of a controller circuit used to control 3 shift registers. The controller will be used to make the shi
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LSUEE 2731AllFall

Lab Report 4

OC9940624 Page
15 Mar 2019
0
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LSUEE 2731AllFall

Semester Project Fall 2013 1

OC9940622 Page
15 Mar 2019
0
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LSUEE 2731AllFall

Experiment 1

OC9940623 Page
15 Mar 2019
0
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LSUEE 2731AllFall

Digital Logic Lab Report 1

OC9940623 Page
15 Mar 2019
0
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LSUEE 2731AllFall

E2G38

OC9940623 Page
15 Mar 2019
0
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LSUEE 2731AllFall

E5G12

OC9940624 Page
15 Mar 2019
0
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