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Chapter

E8G16


Department
Electrical Engineering
Course Code
EE 2731
Professor
All

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Student name: CHARLES THOMPSON.
Student name: ANGELA BALIS .
Student name: MARLIN RUSHING .
Section: 1 Group: 6 .
Shift Registers
This experiment will introduce you to the design of a controller circuit used to
control 3 shift registers. The controller will be used to make the shift register
transfer data between themselves, in both parallel and serial forms.
Digital Inputs:
Data Inputs: Start/Stop (BTN_SOUTH);
SR0, SR1, SR2, & SR3 from switches (SW3 SW0);
Select Lines: None.
Clock: BTNO (A6)
Digital Output: SR1(LED0 LED3), SR2(LED5), & SR3(LED7)
Logic Diagrams:
8 Diagrams:

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CODES FOR EXP. 8:
8.v CODE
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 13:04:31 11/15/2013
// Design Name:
// Module Name: ShiftReg
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module ShiftReg(
input wire StartStop,
input wire Clock,
input wire [3:0] Load,
output reg [3:0] SR1,
output reg [3:0] SR2,
output reg [3:0] SR3
);
// Internal Constraints //
parameter SIZE = 3;
parameter shift_steps = 8;
parameter LOADSR1=3'b001, LOADSR2=3'b010, SHIFT=3'b100;
// Internal Variables //
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