EC Lecture Notes - Lecture 2: Truth Table
11 Sep 2021
Department
Course
Professor
Document Summary
Aim : design and simulate 4-bit parallel adder. A single full adder performs the addition of two one bit numbers and an input carry. Adder is a digital circuit capable of finding the arithmetic sum of two binary numbers that is greater than one bit in length by operating on corresponding pairs of bits in parallel. It consists of full adders connected in a chain where the output carry from each full adder is connected to the carry input of the next higher order full adder in the chain. A n bit parallel adder requires n full adders to perform the operation. So for the two-bit number, two adders are needed while for four bit number, four adders are needed and so on. Parallel adders normally incorporate carry lookahead logic to ensure that carry propagation between subsequent stages of addition does not limit addition speed.
