ECE327 Midterm: ECE 327 University of Waterloo 2011 Term 1 Midterm Solution

• School: University of Waterloo
• Department: Electrical and Computer Engineering
• Course: ECE327
• Professor: All

Document Summary

All requests for re-marks must be submitted in writing to mark aagaard before 9:30am on wed march 2. Ex- ams that are submitted for re-marking will be veri ed against this set. Q1 (24 marks) vhdl semantics (estimated time: 15 minutes) This question analyzes the vhdl semantics of the two processes below. Q1a deals with simulation steps, q1b deals with simulation cycles, and q1c deals with register-transfer-level simulation. Q1a (8 marks) di erences in delta-cycle simulation chart. Yes, there is a scenario where the two simulation charts will be di erent. If ce changes in a simulation cycle in which clk remains constant, then at the end of this simulation cycle, proc b will resume and become postponed. In the next simulation cycle, proc b will activate and become active. 6 marks yes , good justi cation, but no mention of postponed and suspended modes. 6 marks yes , count evaluation of conditions for if statements as simulation steps.