CSC209H5 Lecture 6: Makefile, Compiling, Errno
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Csc209h5s - software programming and tools (winter 2018) In a makefile, it is consist of a series of recipes. The purpose of make is to automate the build process so that. We don"t have to type a long compile command every time we want to compile our code. Dependencies between files are tracked and source files are only recompiled when necessary. Before we look at the full makefile, consider the following makefile rule: test_print: test_print. o ptree. o gcc -wall -g -std=gnu99 -o test_print test_print. o ptree. o. Flags = -wall -werror -std=gnu99 test_print2: test_print. o ptree. o gcc -o $^ # the {flags} will be replaced with the flags variable at top. # $^ will be replaced using the prerequisites/dependencies listed for the target: circle the target. The target is test_print: underline the prerequisites. There is only 1 action. gcc -wall -g -std=gnu99 -o test_print test_print. o ptree. o.