MGMT 1030 Lecture Notes - Lecture 17: Addressing Mode, Instruction Set
MGMT 1030 Lecture 17 Notes – Addressing Modes
Introduction
• There may be many different addressing modes available within a single computer.
• Additionally, variations on these instructions are frequently used to handle different
data sizes.
• Thus, there may be a LOAD BYTE instruction, a LOAD HALF-WORD (2 bytes), a LOAD
WORD (4 bytes), and a LOAD DOUBLE WORD (8 bytes) within the same instruction set.
(Iidetally, the oept of a word is ot osistet etwee aufaturers.
• To some manufacturers the size of a word is 16 bits
• To others, it is 32 or even 64 bits.
• The Little Man LOAD and STORE instructions are simple, though adequate, examples of
MOVE instructions.
• Other than expanding the addressing mode capabilities and adding multiple word size
capabilities, which we have already discussed, the major limitation of the Little Man
LOAD and STORE instructions is the fact that they are designed to operate with a single
accumulator.
• When we expand the number of accumulators or general-purpose registers, we must
expand the instruction to determine which register we wish to use.
• Thus, the instruction must provide a field for the particular register.
• Fortunately, it takes very few bits to describe a register.
• Even sixteen registers require only 4 bits.
• On the other hand, if the computer uses the registers to hold pointers to the actual
memory addresses as its standard addressing mode, the required instruction size may
actually decrease, since fewer bits are required for the address field in this case.
• Additionally, it is desirable to have the capability to move data directly between
registers, since such moves do not require memory access and are therefore faster to
execute.
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