MGMT 1030 Lecture Notes - Lecture 12: Parallel Communication

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MGMT 1030 Lecture 12 Notes Destination Point
Introduction
An address may be required if the message is being passed through the destination
point to another location.
Addressing is also not required for a multipoint bus where the signal is actually intended
to reach all the other locations at once
This is sometimes the case for buses that are internal to the CPU.
Addressing may be integral to the lines of the bus itself, or may be part of the protocol
that defines the meaning of the data signals being transported by the bus.
Typical point-to-point and multipoint bus configurations are illustrated
A parallel bus that carries, say, 64 bits of data and 32 bits of address on separate data
and address lines would require a bus width of 96 lines, even before control lines are
considered.
The parallel bus is characterized by high throughput capability because all the bits of a
data word are transferred at once.
Virtually every bus internal to the CPU is a parallel bus, since the high speed is essential
to CPU operation.
Also most internal operations and registers are inherently parallel, and the use of serial
buses would require additional circuitry to convert the parallel data to serial and back
again.
Until recently, the buses that connected the CPU with memory and various high speed
I/O modules such as disk and display controllers were also parallel, for similar reasons.
The parallel bus does have a number of disadvantages, though.
Parallel buses are expensive and consume a considerable amount of space.
Connectors used with parallel buses are also expensive because of the large number of
pins involved.
External parallel buses, such as printer cables are also expensive because of the large
number of lines required.
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