CS 120 Lecture Notes - Lecture 10: Ath

• School: Binghamton University
• Department: Computer Science
• Course: CS 120
• Professor: Steven Moore

Document Summary

There is a period of ti(cid:373)e (cid:449)here the output of a (cid:272)ir(cid:272)uit does(cid:374)"t (cid:373)at(cid:272)h the i(cid:374)put gi(cid:448)e(cid:374), because the ele(cid:272)tro(cid:374)s i(cid:374) the i(cid:374)put ha(cid:448)e(cid:374)"t tra(cid:448)elled to the output yet. Note: from now on, output will be labeled q. Creating a table for binary addition, and ignoring overflow: This is (cid:272)alled a half adder (cid:271)e(cid:272)ause it does(cid:374)"t ha(cid:374)dle o(cid:448)erflo(cid:449) a(cid:374)d (cid:272)arry. To deal with carry, we can build a full adder: We"re usi(cid:374)g three i(cid:374)puts to get a complete list of possible carry-overs (notice that with two inputs we never get 1 ouput with 1 carry-over). There are seven gates for all input states (technically there should be eight, but the 000 case is auto(cid:373)ati(cid:272)ally (cid:1004), so it is(cid:374)"t (cid:374)e(cid:272)essary). The gates with two not bubbles are set to equal 1 when only one input bit is 1; the gates with one not bubble are set to equal 1 when there are two input bits equal to 1.