ESE 382 Lecture Notes - Lecture 2: Vhdl, Xor Gate, And Gate
24 May 2020
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Document Summary
A module is defined as a part of a system that has well defined inputs and outputs and performs a well defined function. In a program, a module is a group of statements that are bound by explicit delimiters and given a name. Vhdl has a number of constructs that can be characterized as modules. In structural design the basic module is the design entity. In behavioral code a module can be a process, procedure, or function. For a set of related declarations and operators a package can be a module. A designs unit is a vhdl construct that can be separately compiled and stored in a designs library. Designs units provide modularity for designs management of complex systems. A design unit consists of a context clause followed by a library unit. Compilation of a designs unit defines the corresponding library unit, which is stored in a designs library. Represents all or a portion of a hardware designs.
