I&C SCI 51 Lecture Notes - Lecture 5: Disk Controller, Endianness, Cpu Cache
11 Dec 2016
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Document Summary
Computer equation = cpu + memory + i/o. Datapath cycle and how it relates to cpu speed. Pipelining - overlapping the execution of instructions to complete tasks faster. Circuits recognize and use values that represent the voltage levels. The smallest quantity of memory is a bit. Bytes are made of 8 bits each. M x n: m cells of n bits each. K = log2(m) address input signals or m = 2^k cells. 4096 = 4 decimal digits for each address. Big-endian stores the most significant byte of a word in the smallest address and the least significant byte in the largest address (mainframe computers and the internet) Little-endian systems store the least significant byte in the smallest address (intel x86) We want fast and lots of it. Create a layered approach to memory: memory hierarchy. The slower the memory, the greater # of cycles the cpu will have to wait. Fast memory is very expensive, slow is cheap.
