CISC 3593 Chapter Notes - Chapter 2: Basic Block, Symbol Table, Global Optimization
6 Nov 2017
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Document Summary
Simplicity favors regularity: keep hardware simple at fixed number of operands. Regularity motivates many features of the mips instruction set: keeping all instructions a single size, always requiring three register operands in arithmetic instructions, and keeping the register fields in the same place in each instruction format. A very large number of registers may increase the clock cycle time simply because it takes electronic signals longer when they must travel farther. (mips has 32 registers rather than many more. ) One mips example was the compromise between providing for larger addresses and constants in instructions and keeping all instructions the same length. Examples of making the common mips case fast include pc-relative addressing for conditional branches and immediate addressing for larger constant operands. Arithmetic instructions correspond to the operations found in assignment statements. Transfer instructions are most likely to occur when dealing with data structures like arrays or structures. Conditional branches are used in if statements and in loops.
