CSC258H1 Lecture Notes - Verilog, Xor Gate

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20 Apr 2013
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Week 2 review: q1 express 2 input xor gate as a combination of nand / not gates. Karnaught map review from jan21ce: k-maps provide an illustration of a circuit"s minterms (or maxterms) and a guide to how neighboring terms may be combined. 1: q2 what are the mintermsfor the truth table below, k-map example. Create a circuit with 4 iniputs (a, b, c, d) and 2 output (x, y) The output x is high whenever 2+ of the inputs are high. The ouput y is high whenever 3+ of the inputs are high. M7: there are cases where no combinations are possible.

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