MGMT 1030 Lecture Notes - Lecture 9: Memory Address, Backplane, Bit
6 May 2018
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MGMT 1030 Lecture 9 Notes – Conductor
Introduction
• Each conductor in the bus is commonly known as a line.
• Lines on a bus are often assigned names, to make individual lines easier to identify.
• In the simplest case, each line carries a single electrical signal.
• The signal might represent one bit of a memory address, or a sequence of data bits, or a
timing control that turns a device on and off at the proper time.
• Sometimes, a conductor in a bus might also be used to carry power to a module.
• In other cases, a single line might represent some combination of functions.
• The lines on a bus can be grouped into as many as four general categories: data,
addressing, control, and power.
• Data lines carry the data that is eig oved fro oe loatio to aother.
• Address lines specify the recipient of data on the bus.
• Control lines provide control and timing signals for the proper synchronization and
operation of the bus and of the modules and other components that are connected to
the bus.
• A bus connecting only two specific 32-bit registers within a CPU
• For example, may require just thirty-two data lines plus one control line to turn the bus
on at the correct time.
• A backplane that interconnects a 64-bit data width CPU, a large memory
• Many different types of peripherals might require many more than a hundred lines to
perform its function.
• The bus that connects the CPU and memory
• For example, needs address lines to pass the address stored in the MAR to the address
decoder in memory and data lines to transfer data between the CPU and the memory
MDR.
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