ECE327 Midterm: ECE 327 University of Waterloo 2014 Term 2 Midterm
31 Jan 2019
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Instructions and general information: 100 marks total, time limit: 1 hour and 20 minutes (80 minutes, no books, no notes, no computers. If you are confused about a question, write down your assumptions or interpretation: justi cations of answers will be marked according to correctness, clarity, and concision. Q2 the yellow, the red, and the goaaalllll!!! Q1 (10 marks) vhdl semantics (estimated time: 7 minutes) Justify your answer in terms of vhdl simulation semantics. Q2 (20 marks) the yellow, the red, and the goaaalllll!!! (estimated time: 10 minutes) Ece 327: if the code does not follow good coding practices: explain why, if the code does follow good practices: draw the circuit that would most likely result from synthesizing the code. Notes: if the vhdl code includes an implicit state machine: draw the gates, wires, and ops for the datapath. All of the arithmetic and logical operators in the vhdl code (e. g. , + , - , < , and.
