MGMT 1040 Chapter Notes - Chapter 8: Speculative Execution, Multiprocessing, Superscalar Processor
8 May 2018
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MGMT 1040 Chapter 8 Notes – Summary
Introduction
• Multiple execution units to allow parallel execution of unrelated instructions.
• A variety of innovative techniques, including rename registers, speculative execution,
out-of-order execution, and branch prediction help to reduce bottlenecks and
contribute to the performance.
• We noted that the resulting model is capable of superscalar processing, with
instructions processed at average rates far exceeding the cycle rate of the clock.
• We then turned our attention to memory enhancements, particularly the techniques
and benefits of cache memory, a fast, intermediate memory between then CPU and
regular memory.
• Following this, we put together a model of the compleat susperscalar CPU that
contained all of the features that we had presented up to this point.
• To increase performance even further, it is possible to combine CPUs into multiple units
that share memory, buses, I/O, and other resources, a concept called multiprocessing.
• We presented two different configurations of multiprocessors.
• We concluded the chapter with a brief introduction to the technology used to
implement the modern processor.
• With all of the advances and variations in technology, architecture, and organization
that we have introduced.
• Despite all of the different types of computers, applications, and uses for computers
that are available today.
• It is important to remember that, regardless of the specifics, every current CPU
conforms to the basic model created by Von Neumann more than a half century ago.
• There is little evidence that the basic concepts that govern CPU operation are likely to
change in the near future.
• The many references used to write all listed in the bibliography section
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