CEG 2136 Lecture Notes - Lecture 15: Aadhaar, Address Bus, Static Random-Access Memory
11 May 2018
School
Department
Course
Professor
1
Memory Unit
Dr. Voicu Groza
SITE Hall, Room 5017
562 5800 ext. 2159
CEG 2136 Computer Architecture I
2
Outline
The System Bus Model of a Computer
Memory general Characteristics
RAM (Random Access Memory)
ROM (Read Only Memory)
Memory design
Memory hierarchy
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2
CEG 2136 Computer Architecture I
The System Bus Model of a Computer
The bus connects the CPU with other parts and reduces connections
CPU put address on the Bus, memomory receives address.
During execution each instruction is brought into the ALU from memory,
one instruction at a time.
The output is displayed on output device such as CRT
Control unit manages. movement of instructions, data, and control signals
Input and
Output
(I/O)
Memory
CPU
(Registers,
ALU & CU)
Data Bus
Address Bus
Control Bus
System Bus
CEG 2136 Computer Architecture I
Memory Unit
Memories are collection of registers together with associated circuits
needed to transfer information in and out of storage.
The memory stores binary information in groups of bits called words.
Each memory location (register) holds one “word” that
can be read or written into the memory
is assigned a unique identification number called an address
addresses are consecutively numbered
Data is transferred to/from memory in multiples of words; i.e., it is NOT
possible to read or write more or less bits than the size of the word
One can access memory using only one address at a time, while
simultaneous readings and writings are not possible
A word in memory may contain any type of binary information that fits its
size (e.g., a number, an instruction code, a memory address, or one or
more alphanumeric characters)
The internal structure of a memory is specified by the number of words it
contains and the number of bits in each word. 4
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3
CEG 2136 Computer Architecture I
Data
A byte is a group of 8 bits
⇒
16 bits = 2 bytes 32 bits = 4 bytes
1K(kilo) = 210 1M(mega) = 220 1G(giga) = 230
⇒
64K = 26K = 26×210 = 216 5
CEG 2136 Computer Architecture I
MEMORIES
Memory Technologies:
Random Access Memory (RAM) - volatile
Static RAM (SRAM) – latches in an array of registers
Dynamic RAM (DRAM) – MOSFET “capacitors”
Read Only Memory (ROM) – permanent (not programmable)
Programmable ROM (PROM) – “fuse” principle
EPROM – permanent, but erasable & reprogrammable
UV-EPROM
EEPROM
FLASH memory – erase all cells of the memory array at once
EEPROM – erase smaller blocks of the whole array
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Document Summary
The system bus model of a computer. The bus connects the cpu with other parts and reduces connections. Cpu put address on the bus, memomory receives address. During execution each instruction is brought into the alu from memory, one instruction at a time. The output is displayed on output device such as crt. Control unit manages. movement of instructions, data, and control signals. Memories are collection of registers together with associated circuits needed to transfer information in and out of storage. The memory stores binary information in groups of bits called words. Each memory location (register) holds one word that. Can be read or written into the memory. Is assigned a unique identification number called an address. Data is transferred to/from memory in multiples of words; i. e. , it is not possible to read or write more or less bits than the size of the word.
