MGMT 1030 Lecture Notes - Lecture 14: Conventional Pci
6 May 2018
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MGMT 1030 Lecture 14 Notes – Classification of instructions
Introduction
• Using modern materials such as fiber optics, very high transfer rates may be achieved.
• In general, control is handled using a bus protocol that establishes agreement as to the
meaning and timing of each signal on the line among the components connected to the
line.
• It is also possible to design a parallel bus that multiplexes addresses and data on the
same lines, as the PCI bus does, or multiplexes 32-bit data on sixteen data lines, for
example.
• For example, the Pentium 4 multiplexes 128-bit data words to fit a 64-bit data path on
the Pentium system bus.
• To use a bus, the circuits that are connected to the bus must agree on a bus protocol.
• Recall from that a protocol is an agreement between two or more entities that
establishes a clear, common path of communication and understanding between them.
• A bus protocol is simply a specification that spells out the meaning of each line and each
signal on each line for this purpose.
• Thus, a particular control line on a bus might be defined as a line that determines if the
bus is to be used for memory read or memory write.
• Both the CPU and memory would hae to agree, for eaple, that a o that
partiular lie eas eor read ad a o the lie eas eor rite.
• The line might have a name like MREAD/MWRITE, where the bar over MWRITE means
that a is the atie state.
• The ar itself stads for NOT.
• Buses are frequently notated on diagrams using widened lines to indicate buses.
• Sometimes a number is also present on the diagram.
• The number indicates the number of separate lines in the bus.
• Two alternative ways of notating buses in diagrams are shown
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