MGMT 1000 Chapter Notes - Chapter 13: Memory Buffer Register, Memory Address Register, Address Decoder
MGMT 1000 Chapter 13 Notes – Summary
Introduction
• The concept described here is correct.
• The memory data register is designed such that it is effectively connected to every cell
in the memory unit.
• Each bit of the MDR is connected in a column to the corresponding bit of every location
in memory.
• However, the addressing method assures that only a single row of cells is activated at
any given time.
• Thus, only one memory location is addressed at any one time.
• A specific example of this is shown
• Note that in the drawing msb stands for most significant bit and lsb for least significant
bit.
• As a siple aalog to the operatio ee just desried, osider the eor as
being stored in a glass box, as shown
• The memory data register has a window into the box.
• The viewer, who represents each cell in the memory data register, can see the cells in
corresponding bit position for every location in memory through the window.
• The cells themselves are light bulbs that can be turned on (1) or off (0).
• The output from the memory address register is passed to an address decoder.
• The output from the address decoder in our analogy consists of a series of lines, each of
which can light up the bulbs in a single row of cells.
• Only one line at a time can be activated—specifically, the one corresponding to the
decoded address.
• The atie lie ill light the uls that orrespod to s, leaig the s dark.
• The viewer therefore will see only the single group of cells that is currently addressed by
the memory address register.
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