MGMT 1000 Chapter Notes - Chapter 12: Memory Buffer Register, Memory Address Register
MGMT 1000 Chapter 12 Notes – Summary
Introduction
The Operation of Memory
• To understand the details of instruction execution for the real CPU, you need first to see
how instructions and data can be retrieved from memory.
• Real memory, like the mailboxes in the Little Man Computer, consists of cells, each of
which can hold a single value, and each of which has a single address.
• Two registers, the memory address register and the memory data register
• Act as an interface between the CPU and memory.
• The memory data register is called the memory buffer register by some computer
manufacturers.
• A simplified representation of the relationship between the MAR, the MDR, and
memory.
• Each cell in the memory unit holds 1 bit of data.
• The cells are organized in rows.
• Each row consists of a group of one or more bytes.
• Each group represents the data cells for one or more consecutive memory addresses,
show i the figure as addresses , , − .
• In modern computers, it is common to address 8 bytes at a time to speed up memory
access between the CPU and memory.
• The CPU can still isolate individual bytes from the group of eight for its use, however.
• The eory address register holds the address i the eory that is to be opeed
for data.
• The MAR is connected to a decoder that interprets the address and activates a single
address line into the memory.
• There is a separate address line for each group of cells in the memory
• Thus, if there are n bits of addressing, there will be 2n address lines.
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