MGMT 1050 Chapter Notes - Chapter 6: Memory Address, Memory Buffer Register, Instruction Set
MGMT 1050 Chapter 6 Notes – Summary
Introduction
• It is useful to note the basic similarities between the instruction set formats in different
computers.
• Functionally, the operation of the CPU, together with memory, is essentially identical to
that of the Little Man Computer.
• For each component of the Little Man Computer, there is a corresponding component in
the computer unit.
• Within the CPU, the most important components are registers.
• Data may be moved between registers, may be added or subtracted from the current
contents of a register, and can be shifted or rotated within a register or between
registers.
• Each instruction in the instruction set is executed by performing these simple
operations, using the appropriate choice of registers and operations in the correct
sequence for the particular instruction.
• The sequence of operations for a particular instruction is known as its fetch-execute
cycle.
• A fetch-execute cycle exists for every instruction in the instruction set.
• Fetch-execute instruction cycles constitute the basis for all program execution in the
computer.
• The sequence for each instruction corresponds closely to the actions taken by the Little
Man in performing a similar instruction.
• The operation of memory is intimately related to two registers in particular, the
memory address register and the memory data register.
• Addresses placed into the MAR are decoded in memory, resulting in the activation of a
single memory address line.
• At the proper instant, data can then be transferred in either direction between that
memory location and the MDR.
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