MGMT 1050 Lecture Notes - Lecture 20: Memory Address, Opcode, Instruction Set

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MGMT 1050 Tutorial 20 Notes Instruction word formats
Introduction
Instructions in the Little Man Computer were made up entirely of three-digit decimal
numbers, with a single-digit op code, and a two-digit address field.
The address field was used in various ways
For most instructions, the address field contained the two-digit address where data for
the instruction could be found (e.g., LOAD) or was to be placed (STORE).
In a few instructions, the address field was unused (e.g., HALT).
For the branch instructions, the address field space was used instead to hold the
address of the next instruction to be executed.
For the I/O instructions, the address field became a sort of extension of the op code.
I reality, the I/O address field otaied the address of a I/O deie, i our ase 
for the in basket and 02 for the out basket.
The instruction set in a typical real CPU is similar.
Again, the instruction word can be divided into an op code and zero or more address
fields.
A simple 32-bit instruction format with one address field might look like that shown
In this example, the 32 bits are divided into an 8-bit op code and 24 bits of address field.
In the Little Man Computer, reference to an address specifically referred to a memory
address.
However, we have already noted that the computer might have several general-purpose
registers and that it would be necessary for the programmer to select a particular
register to use as a part of the instruction.
To e ore geeral, e ill use the ord address to refer to ay data loatio,
whether it is a user-accessible register or a memory location.
We will use the more specific expression memory address when we want to specify that
the address is actually a memory location.
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