MGMT 1000 Chapter Notes - Chapter 16: Memory Address Register, Instruction Set

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MGMT 1000 Chapter 16 Notes Summary
Introduction
Notice that his data fetches and stores are still limited to the one hundred locations that
the two digits of the address field in the instruction word can address.
Similarly, there are two factors that determine the capacity of memory in a real
computer.
The number of bits in the memory address register determines how many different
address locations can be decoded.
Just as the two-digit addresses in the Little Man Computer resulted in a maximum of
one hundred mailboxes.
For a memory address register of width k bits, the number of possible memory
addresses is M = 2k
The other factor in establishing memory capacity is of course the number of bits in the
address field of the instruction set, which establishes how many memory locations can
be directly addressed from the instruction.
In the Little Man Computer, we have assumed that these two size factors are the same,
but in a real computer, that is not necessarily the case.
Even if the size of the instruction address field is sufficient to support a larger amount of
memory, the number of physical memory locations is, in fact, determined by the size of
the memory address register.
There are also other ways of extending the addresses specified within instructions so
that we can reach more addresses than the size of the instruction address field would
allow.
Just to give you one common method, consider a computer that can use one of the
general-purpose registers to hold an address.
To find a memory location, the computer would use the value in that register as a
pointer to the address.
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